On Wed, Mar 28, 2018 at 8:46 PM, Manivannan Sadhasivam
<manivannan.sadhasivam@xxxxxxxxxx> wrote:
> Add pinctrl driver for Actions Semi S900 SoC. The driver supports
> pinctrl, pinmux and pinconf functionalities through a range of registers
> common to both gpio driver and pinctrl driver.
>
> Pinmux functionality is available only for the pin groups while the
> pinconf functionality is available for both pin groups and individual
> pins.
> +static void owl_update_bits(void __iomem *base, u32 mask, u32 val)
> +{
> + u32 reg_val;
> +
> + reg_val = readl_relaxed(base);
> +
> + reg_val &= ~mask;
> + reg_val |= val;
Usual pattern here is
reg_val = (reg_val & ~mask) | (val & mask);
This will allow to avoid possible overflow.
> +
> + writel_relaxed(reg_val, base);
> +}
> + tmp = readl_relaxed(pctrl->base + reg);
> + mask = (1 << width) - 1;
> + arg = (tmp >> bit) & mask;
This looks like a candidate for a helper function. You have at least
one more same code.
Something like
..._read_field(reg, mask, shift)
> + mask = (1 << width) - 1;
> + mask = mask << bit;
> +
> + owl_update_bits(pctrl->base + reg, mask, (arg << bit));
Similar here,
..._write_field(regm mask, shift, arg)
> + tmp = readl_relaxed(pctrl->base + reg);
> + mask = (1 << width) - 1;
> + arg = (tmp >> bit) & mask;
> + mask = (1 << width) - 1;
> + mask = mask << bit;
> +
> + owl_update_bits(pctrl->base + reg, mask, (arg << bit));
> +static const struct pinconf_ops owl_pinconf_ops = {
> + .is_generic = true,
> + .pin_config_get = owl_pin_config_get,
> + .pin_config_set = owl_pin_config_set,
> + .pin_config_group_get = owl_group_config_get,
> + .pin_config_group_set = owl_group_config_set
It's still good idea to leave comma here...
> +};
> +
> +static struct pinctrl_desc owl_pinctrl_desc = {
> + .pctlops = &owl_pinctrl_ops,
> + .pmxops = &owl_pinmux_ops,
> + .confops = &owl_pinconf_ops,
> + .owner = THIS_MODULE
...and here, and in all similar places.
> +};
> +
--
With Best Regards,
Andy Shevchenko
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