On Saturday 15 February 2014 11:20:08 Andrew Lunn wrote: > Instantiate the L2 cache from DT. Indicate in DT where the cache > control register is and if write through should be made. > > Signed-off-by: Andrew Lunn <andrew@xxxxxxx> > cc: devicetree@xxxxxxxxxxxxxxx > I guess this answers part of my question for patch 5, but I also wonder if the run-time setting is correct now with the hardcoded #ifdef in arch/arm/mm/proc-feroceon.S checkign for the Kconfig option. Presumably the code should match whatever is set in the cache control register. Arnd -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
