On Sun, Feb 18, 2018 at 08:46:35PM -0600, Rob Herring wrote: > On Mon, Feb 12, 2018 at 10:56:40PM +0530, Preetham Chandru Ramchandra wrote: > > From: Preetham Ramchandra <pchandru@xxxxxxxxxx> > > > > This adds bindings documentation for the > > AHCI controller on Tegra210 > > > > Signed-off-by: Preetham Chandru R <pchandru@xxxxxxxxxx> > > --- > > v7: > > * For Aux register set drop the Tegra210 since this register > > set also works on Tegra124 > > * rephrase the sentence for cml1 clock > > * change the commit subject to include ahci-tegra > > * drop pll_e since CCF handles it automatically as > > CML1 is a child clock of it. > > v4: > > * changed the commit message > > * changed 'sata-cold' reset to mandatory for t210 and t124 > > * Removed the regulators for T210 since these regulators > > will be enabled in phy driver. > > v3: > > * Add AUX register. > > v2: > > * change cml1, pll_e and phy regulators as optional > > for T210. > > --- > > .../bindings/ata/nvidia,tegra124-ahci.txt | 35 ++++++++++++++-------- > > 1 file changed, 22 insertions(+), 13 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/ata/nvidia,tegra124-ahci.txt b/Documentation/devicetree/bindings/ata/nvidia,tegra124-ahci.txt > > index 66c83c3e8915..0f4520a00716 100644 > > --- a/Documentation/devicetree/bindings/ata/nvidia,tegra124-ahci.txt > > +++ b/Documentation/devicetree/bindings/ata/nvidia,tegra124-ahci.txt > > @@ -1,20 +1,19 @@ > > -Tegra124 SoC SATA AHCI controller > > +Tegra SoC SATA AHCI controller > > > > Required properties : > > -- compatible : For Tegra124, must contain "nvidia,tegra124-ahci". Otherwise, > > - must contain '"nvidia,<chip>-ahci", "nvidia,tegra124-ahci"', where <chip> > > - is tegra132. > > -- reg : Should contain 2 entries: > > +- compatible : Must be one of: > > + - Tegra124 : "nvidia,tegra124-ahci" > > + - Tegra210 : "nvidia,tegra210-ahci" > > Are you dropping T132? > > > +- reg : Should contain 3 entries: > > You can't just add more entries to existing compatibles. Does this apply > to T124? I'd consider this a bug in existing DTSs. The SATA AUX registers exist as far back as Tegra30. The reason why they were never included in the DTS in because the driver never programmed those registers. However, the driver change in patch 5/7 which uses this has a comment that AUX registers are optional, so perhaps we can just add that fact to the bindings as well. Thierry
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