Re: [PATCH 04/11] soc: renesas: rcar-sysc: add R8A77980 support

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On Fri, Feb 02, 2018 at 09:31:47PM +0300, Sergei Shtylyov wrote:
> Add support for R-Car V3H (R8A77980) SoC power areas to the R-Car SYSC
> driver.
> 
> Based on the original (and large) patch by Vladimir Barinov.
> 
> Signed-off-by: Vladimir Barinov <vladimir.barinov@xxxxxxxxxxxxxxxxxx>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>

For the record, this matches my reading of the documentation:

Reviewed-by: Simon Horman <horms+renesas@xxxxxxxxxxxx>

...

> Index: renesas/drivers/soc/renesas/r8a77980-sysc.c
> ===================================================================
> --- /dev/null
> +++ renesas/drivers/soc/renesas/r8a77980-sysc.c
> @@ -0,0 +1,52 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Renesas R-Car V3H System Controller
> + *
> + * Copyright (C) 2018 Renesas Electronics Corp.
> + * Copyright (C) 2018 Cogent Embedded, Inc.
> + */
> +
> +#include <linux/bug.h>
> +#include <linux/kernel.h>
> +
> +#include <dt-bindings/power/r8a77980-sysc.h>
> +
> +#include "rcar-sysc.h"
> +
> +static const struct rcar_sysc_area r8a77980_areas[] __initconst = {
> +	{ "always-on",	    0, 0, R8A77980_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
> +	{ "ca53-scu",	0x140, 0, R8A77980_PD_CA53_SCU,	R8A77980_PD_ALWAYS_ON,
> +	  PD_SCU },
> +	{ "ca53-cpu0",	0x200, 0, R8A77980_PD_CA53_CPU0, R8A77980_PD_CA53_SCU,
> +	  PD_CPU_NOCR },

...

The above seems consistent with existing usage of struct rcar_sysc_area,
however, I am wondering if any consideration has been given to using
symbolic names for the register offsets that are the 2nd field of the
structure. Something like this for the values used in this patch:

#define RCAR_GEN3_SYSCSR  0
#define RCAR_GEN3_PWRSR3  0x140
#define RCAR_GEN3_PWRSR4  0x180
#define RCAR_GEN3_PWRSR6  0x200
#define RCAR_GEN3_PWRSR7  0x240
#define RCAR_GEN3_PWRSR11 0x400
#define RCAR_GEN3_PWRSR12 0x2c0
#define RCAR_GEN3_PWRSR13 0x300
#define RCAR_GEN3_PWRSR14 0x280
--
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