On Fri 12 Jan 17:05 PST 2018, Karthikeyan Ramasubramanian wrote: > Add device tree binding support for I2C Controller in GENI based > QUP Wrapper. > > Signed-off-by: Sagar Dharia <sdharia@xxxxxxxxxxxxxx> > Signed-off-by: Karthikeyan Ramasubramanian <kramasub@xxxxxxxxxxxxxx> > --- > .../devicetree/bindings/i2c/i2c-qcom-geni.txt | 35 ++++++++++++++++++++++ > .../devicetree/bindings/soc/qcom/qcom,geni-se.txt | 19 ++++++++++++ > 2 files changed, 54 insertions(+) > create mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-geni.txt > > diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-geni.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-geni.txt > new file mode 100644 > index 0000000..ea84be7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/i2c/i2c-qcom-geni.txt > @@ -0,0 +1,35 @@ > +Qualcomm Technologies Inc. GENI Serial Engine based I2C Controller > + > +Required properties: > + - compatible: Should be: > + * "qcom,i2c-geni. As this is a subset of geni it would look better with qcom,geni-i2c imho. > + - reg: Should contain QUP register address and length. > + - interrupts: Should contain I2C interrupt. > + - clock-names: Should contain "se-clk". Omit "clk" from the clock names. > + - clocks: Serial engine core clock needed by the device. > + - pinctrl-names/pinctrl-0/1: The GPIOs assigned to this core. The names > + should be "active" and "sleep" for the pin confuguration when core is active > + or when entering sleep state. No need to describe pinctrl properties - and your description here doesn't match the code. > + - #address-cells: Should be <1> Address cells for i2c device address > + - #size-cells: Should be <0> as i2c addresses have no size component > + > +Optional property: > + - clock-frequency : Desired I2C bus clock frequency in Hz. > + When missing default to 400000Hz. > + > +Child nodes should conform to i2c bus binding. ..."as described in i2c.txt" Regards, Bjorn -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
