Re: [PATCH] thermal: exynos: handle gate clock for misplaced TRIMINFO register

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On Mon, Feb 10, 2014 at 10:50:01AM +0000, Naveen Krishna Ch wrote:
> Hello Mark,
> 
> On 10 February 2014 16:03, Mark Rutland <mark.rutland@xxxxxxx> wrote:
> > On Thu, Nov 07, 2013 at 12:42:34PM +0000, Naveen Krishna Chatradhi wrote:
> >> On Exynos5420 the TMU(4) for GPU has a seperate clock enable bit from
> >> the other TMU channels(0 ~ 3). Hence, accessing TRIMINFO for base_second
> >> should be acompanied by enabling the respective clock.
> >>
> >> This patch which allow for a "clk_sec" clock to be specified in the
> >> device-tree which will be ungated when accessing the TRIMINFO register.
> >
> > Missing binding document update? Or was "clk_sec" originally in the
> > binding but unused?
> >
> > The code seems to expect "tmu_apbif_sec" as the clock name in the DT,
> > but this isn't mentioned in the commit message.
> >
> > I grepped Documentation/devicetree in mainline, but found no reference
> > of either.
> >
> > Thanks,
> > Mark.
> This CL is to be abandoned.

Ok.

> 
> As mentioned in the previous replies to this patch.
> The changes in this patched were merged with
> http://www.spinics.net/lists/devicetree/msg15165.html
> 
> The latest patch set can be found at.
> 1. http://www.spinics.net/lists/devicetree/msg15163.html
> 2. http://www.spinics.net/lists/devicetree/msg15164.html
> 3. http://www.spinics.net/lists/devicetree/msg15165.html
> 4. http://www.spinics.net/lists/devicetree/msg15165.html

I responded here because of your ping message on 2014-02-07. The latest
patches seem to have been posted before that. Was the ping misplaced or
have I misunderstood?

Thanks,
Mark
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