On Friday 12 January 2018 08:55 PM, David Lechner wrote: >> >> PLL output on DA850 must never be below 300MHz or above 600MHz (see >> datasheet table "Allowed PLL Operating Conditions"). Does this take care >> of that? Thats one of the main reasons I recall I went with some >> specific values of prediv, pllm and post div in >> arch/arm/mach-davinci/da850.c > > Apparently, I missed this requirement. It looks like I am going to have to > rework things so that there is some coordination between the PLL and the > PLLDIV clocks in order to get the < 300MHz operating points. Just to make sure we are on the same page. The datasheet constraint is 600 >= PLLOUT >= 300. PLLOUT is output of POSTDIV. The operating points are defined in terms of ARM frequency (and voltage). The OPPs defined in kernel today are here: https://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci.git/tree/arch/arm/mach-davinci/da850.c#n1092 Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
