Hi Hugues, On Wed, Jan 10, 2018 at 03:51:07PM +0000, Hugues FRUCHET wrote: > Good news Maxime ! > > Have you seen that you can adapt the polarities through devicetree ? > > + /* Parallel bus endpoint */ > + ov5640_to_parallel: endpoint { > [...] > + hsync-active = <0>; > + vsync-active = <0>; > + pclk-sample = <1>; > + }; > > Doing so you can adapt to your SoC/board setup easily. > > If you don't put those lines in devicetree, the ov5640 default init > sequence is used which set the polarity as defined in below comment: > ov5640_set_stream_dvp() > [...] > + * Control lines polarity can be configured through > + * devicetree endpoint control lines properties. > + * If no endpoint control lines properties are set, > + * polarity will be as below: > + * - VSYNC: active high > + * - HREF: active low > + * - PCLK: active low > + */ > [...] The properties are at the moment documented as mandatory in DT binding documentation. -- Sakari Ailus e-mail: sakari.ailus@xxxxxx -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html