Hi Anson, On Tue, Jan 2, 2018 at 3:07 PM, Anson Huang <Anson.Huang@xxxxxxx> wrote: > Add 696MHz operating point according to datasheet > (Rev. 0, 12/2015). There is a newer version from 05/2017: https://www.nxp.com/docs/en/data-sheet/IMX6ULAEC.pdf > > Signed-off-by: Anson Huang <Anson.Huang@xxxxxxx> > --- > arch/arm/boot/dts/imx6ul.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi > index e0b4a46..86b3251 100644 > --- a/arch/arm/boot/dts/imx6ul.dtsi > +++ b/arch/arm/boot/dts/imx6ul.dtsi > @@ -68,12 +68,14 @@ > clock-latency = <61036>; /* two CLK32 periods */ > operating-points = < > /* kHz uV */ > + 696000 1275000 > 528000 1175000 > 396000 1025000 > 198000 950000 > >; > fsl,soc-operating-points = < > /* KHz uV */ > + 696000 1275000 Why 1.275V? According to the datasheet, the minimum value for VDD_SOC_CAP is 1.15V for all frequencies. Adding 25mV of margin leads to 1.175V. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
