On 12/13, Abhishek Sahu wrote: > GPLL0 uses 4 bits post divider which should be specified > in clock driver structure. > > Signed-off-by: Abhishek Sahu <absahu@xxxxxxxxxxxxxx> > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
