The Bananapi M3 has an onboard IR receiver. This enables the onboard IR receiver subnode. Other than the other IR receivers this one needs a base clock frequency of 3000000 Hz (3 MHz), to be able to work. Signed-off-by: Philipp Rossak <embed3d@xxxxxxxxx> --- arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 7 +++++++ arch/arm/boot/dts/sun8i-a83t.dtsi | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts index c606af3dbfed..2c92c501cd59 100644 --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts @@ -88,6 +88,13 @@ /* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */ }; +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + base-clk-frequency = <3000000>; + status = "okay"; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 5dbf2f0891c1..679ce3a66b4b 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -470,7 +470,7 @@ #reset-cells = <1>; }; - ir: ir@01f02000 { + ir: ir@1f02000 { compatible = "allwinner,sun5i-a13-ir"; clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; clock-names = "apb", "ir"; -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html