Hello Martin,
I didn't catch the whole discussion but you may want to check
include/dt-bindings/gpio/gpio.h
> #define GPIO_OPEN_DRAIN (GPIO_SINGLE_ENDED | GPIO_ACTIVE_LOW)
This corresponds to
Documentation/devicetree/bindings/gpio/gpio.txt
> Most controllers are however specifying a generic flag bitfield
> in the last cell, so for these, use the macros defined in
> include/dt-bindings/gpio/gpio.h whenever possible:
>
> Example of a node using GPIOs:
>
> node {
> enable-gpios = <&qe_pio_e 18 GPIO_ACTIVE_HIGH>;
> };
>
> GPIO_ACTIVE_HIGH is 0, so in this example gpio-specifier is "18 0" and
> encodes
> GPIO pin number, and GPIO flags as accepted by the "qe_pio_e"
> gpio-controller.
>
> Optional standard bitfield specifiers for the last cell:
>
> - Bit 0: 0 means active high, 1 means active low
> - Bit 1: 1 means single-ended wiring, see:
> https://en.wikipedia.org/wiki/Single-ended_triode
> When used with active-low, this means open drain/collector, see:
> https://en.wikipedia.org/wiki/Open_collector
> When used with active-high, this means open source/emitter
Regards,
Patrick
Am 29.11.2017 um 12:55 schrieb kernel@xxxxxxxxxxxxxxxx:
> Hi Rob!
>
> Thanks for all the effort - I shall incorporate those changes into V2.
>
>> s/Microcip/Microchip/
>> s/_/-/
>>
>>> + 0 = Start of Frame output
>>> + default: 10
>>> + - microchip,clock_div = <1|2>: internal clock divider - default 1
>>> + - microchip,gpio_opendrain: gpio (int0,1) in open drain mode
>>> + instead of default push/pull
>>> + - microchip,int_opendrain: int pin in open drain mode
>>> + instead of default push/pull
>> IIRC, we have a standard property for this.
> Would you know what that could be - I did a quick search for
> standard properties, but could not find a definitive list…
>
> The only thing I found in:
> Documentation/devicetree/bindings/w1/w1-gpio.txt
> is:
> linux,open-drain
>
> But there is also:
> nvidia,open-drain
> open_drain
> open-drain
> drive-open-drain (pinctrl)
> st,irq-open-drain
>
> Only the last is specific to the interrupt line and none to the other
> GPIOs of the chip (txcan, GPIO) - and each can get set differently.
>
> So how shall I implement that?
>
> Thanks,
> Martin--
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