On Mon, 20 Nov 2017 13:47:09 PST (-0800), robh@xxxxxxxxxx wrote:
On Mon, Nov 20, 2017 at 11:50:22AM -0800, Palmer Dabbelt wrote:
RISC-V doesn't currently specify a mechanism for enabling or disabling
CPUs. Instead, we assume that all CPUs are enabled on boot, and if
someone wants to save power we instead put a CPU to sleep via a WFI
loop.
This patch adds "enable-method" to the RISC-V CPU binding, which
currently only has the value "none". This allows us to change the
enable method in the future.
I think "none" should just be no cpu-enable-method property.
I'm OK with that.
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