Hi David,
On 07/28/2017 07:01 PM, David Miller wrote:
From: Alexandru Gagniuc <alex.g@xxxxxxxxxxxx>
Date: Fri, 28 Jul 2017 15:07:03 -0700
Before the GMAC on the Anarion chip can be used, the PHY interface
selection must be configured with the DWMAC block in reset.
This layer covers a block containing only two registers. Although it
is possible to model this as a reset controller and use the "resets"
property of stmmac, it's much more intuitive to include this in the
glue layer instead.
At this time only RGMII is supported, because it is the only mode
which has been validated hardware-wise.
Signed-off-by: Alexandru Gagniuc <alex.g@xxxxxxxxxxxx>
I don't see how this fits into any patch series at all. If this is
part of a series you posted elsewhere, you should keep netdev@ on
all such postings so people there can review the change in-context.
I used the --cc-cmd option to send-email. I'll be sure to CC netdev@ on
[PATCH v2].
Alex
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