From: Songjun Wu <songjun.wu@xxxxxxxxxxxxx>
Add isc node, it conflicts with pdmic and uart3.
Signed-off-by: Songjun Wu <songjun.wu@xxxxxxxxxxxxx>
[claudiu.beznea@xxxxxxxxxxxxx: place isc node after hlcdc node]
Signed-off-by: Claudiu Beznea <claudiu.beznea@xxxxxxxxxxxxx>
---
arch/arm/boot/dts/sama5d2.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 71e9d83..9d13b55 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -416,6 +416,17 @@
};
};
+ isc: isc@f0008000 {
+ compatible = "atmel,sama5d2-isc";
+ reg = <0xf0008000 0x4000>;
+ interrupts = <46 IRQ_TYPE_LEVEL_HIGH 5>;
+ clocks = <&isc_clk>, <&iscck>, <&isc_gclk>;
+ clock-names = "hclock", "iscck", "gck";
+ #clock-cells = <0>;
+ clock-output-names = "isc-mck";
+ status = "disabled";
+ };
+
ramc0: ramc@f000c000 {
compatible = "atmel,sama5d3-ddramc";
reg = <0xf000c000 0x200>;
@@ -925,6 +936,11 @@
atmel,clk-output-range = <0 83000000>;
};
+ isc_gclk: isc_gclk {
+ #clock-cells = <0>;
+ reg = <46>;
+ };
+
pdmic_gclk: pdmic_gclk {
#clock-cells = <0>;
reg = <48>;
--
2.7.4
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