Hi,
On Thu, Jun 15, 2017 at 09:59:30PM +0800, Phil Reid wrote:
> i2c_smbus commands handle the correct byte order for smbus transactions
> internally. This will currently result in incorrect operation on big
> endian systems.
>
> Signed-off-by: Phil Reid <preid@xxxxxxxxxxxxxxxxx>
Thanks, queued.
-- Sebastian
> drivers/power/supply/bq24735-charger.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/power/supply/bq24735-charger.c b/drivers/power/supply/bq24735-charger.c
> index eb01453..6931e1d 100644
> --- a/drivers/power/supply/bq24735-charger.c
> +++ b/drivers/power/supply/bq24735-charger.c
> @@ -81,14 +81,12 @@ static int bq24735_charger_property_is_writeable(struct power_supply *psy,
> static inline int bq24735_write_word(struct i2c_client *client, u8 reg,
> u16 value)
> {
> - return i2c_smbus_write_word_data(client, reg, le16_to_cpu(value));
> + return i2c_smbus_write_word_data(client, reg, value);
> }
>
> static inline int bq24735_read_word(struct i2c_client *client, u8 reg)
> {
> - s32 ret = i2c_smbus_read_word_data(client, reg);
> -
> - return ret < 0 ? ret : le16_to_cpu(ret);
> + return i2c_smbus_read_word_data(client, reg);
> }
>
> static int bq24735_update_word(struct i2c_client *client, u8 reg,
> --
> 1.8.3.1
>
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