Hi,
On Thu, Jun 15, 2017 at 09:59:29PM +0800, Phil Reid wrote:
> i2c_smbus commands handle the correct byte order for smbus transactions
> internally. This will currently result in incorrect operation on big
> endian systems.
>
> Signed-off-by: Phil Reid <preid@xxxxxxxxxxxxxxxxx>
Thanks, queued.
-- Sebastian
> drivers/power/supply/sbs-battery.c | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/power/supply/sbs-battery.c b/drivers/power/supply/sbs-battery.c
> index e3a114e..cf43e38 100644
> --- a/drivers/power/supply/sbs-battery.c
> +++ b/drivers/power/supply/sbs-battery.c
> @@ -199,7 +199,7 @@ static int sbs_read_word_data(struct i2c_client *client, u8 address)
> return ret;
> }
>
> - return le16_to_cpu(ret);
> + return ret;
> }
>
> static int sbs_read_string_data(struct i2c_client *client, u8 address,
> @@ -265,7 +265,7 @@ static int sbs_read_string_data(struct i2c_client *client, u8 address,
> memcpy(values, block_buffer + 1, block_length);
> values[block_length] = '\0';
>
> - return le16_to_cpu(ret);
> + return ret;
> }
>
> static int sbs_write_word_data(struct i2c_client *client, u8 address,
> @@ -278,8 +278,7 @@ static int sbs_write_word_data(struct i2c_client *client, u8 address,
> retries = chip->i2c_retry_count;
>
> while (retries > 0) {
> - ret = i2c_smbus_write_word_data(client, address,
> - le16_to_cpu(value));
> + ret = i2c_smbus_write_word_data(client, address, value);
> if (ret >= 0)
> break;
> retries--;
> --
> 1.8.3.1
>
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