* Suman Anna <s-anna@xxxxxx> [170607 14:31]: > Hi Tony, > > The following series configures the initial frequencies for the required > DPLLs and corresponding output divider clocks used by various remoteproc > accelerators (DSP, IVAHD) on OMAP4, OMAP5 & DRA7xx/AM57xx SoCs and the > GPU on DRA7xx/AM57xx SoCs. All these devices require Adaptive Voltage > Scaling (AVS) to be programmed at all OPPs at boot time, which is > programmed in the bootloader. Furthermore, DVFS is not supported on > these domains implying a one-time OPP clock frequency setup. Tero, care to comment or ack this series? Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
