Hi wadim,
2017-04-06 21:04 GMT+08:00 Wadim Egorov <w.egorov@xxxxxxxxx>:
> The phyCORE-RK3288 is a SoM (System on Module) containing a RK3288 SoC.
> The module can be connected to different carrier boards.
> It can be also equipped with different RAM, SPI flash and eMMC variants.
> The Rapid Development Kit option is using the following setup:
>
> - 1 GB DDR3 RAM (2 Banks)
> - 1x 4 KB EEPROM
> - DP83867 Gigabit Ethernet PHY
> - 16 MB SPI Flash
> - 4 GB eMMC Flash
>
> Signed-off-by: Wadim Egorov <w.egorov@xxxxxxxxx>
> ---
> Changes in v2:
> - Added a dual license which is used for all rk3288 based boards.
>
> Include minor changes from Heiko Stübner:
> - moved phy-handle property up a bit
> - switches compatible and #address+#size-cells in mdio0
> - dropped rockchip,grf from &io_domains (grf is a simple-mfd and can
> get the grf syscon on its own via its parent)
> - vdd_cpu: regulator@60 (from fan53555@60)
> - serial_flash: flash@0 (from m25p80@0)
> Nodes should be named after their "category" not the actual device
>
> ---
> arch/arm/boot/dts/rk3288-phycore-som.dtsi | 497 ++++++++++++++++++++++++++++++
> 1 file changed, 497 insertions(+)
> create mode 100644 arch/arm/boot/dts/rk3288-phycore-som.dtsi
>
> diff --git a/arch/arm/boot/dts/rk3288-phycore-som.dtsi b/arch/arm/boot/dts/rk3288-phycore-som.dtsi
> new file mode 100644
> index 0000000..26cd3ad
> --- /dev/null
> +++ b/arch/arm/boot/dts/rk3288-phycore-som.dtsi
> @@ -0,0 +1,497 @@
> +/*
> + * Device tree file for Phytec phyCORE-RK3288 SoM
> + * Copyright (C) 2017 PHYTEC Messtechnik GmbH
> + * Author: Wadim Egorov <w.egorov@xxxxxxxxx>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/net/ti-dp83867.h>
> +#include "rk3288.dtsi"
> +
> +/ {
> + model = "Phytec RK3288 phyCORE";
> + compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
> +
> + /*
> + * Set the minimum memory size here and
> + * let the bootloader set the real size.
> + */
> + memory {
> + device_type = "memory";
> + reg = <0 0x8000000>;
> + };
> +
> + aliases {
> + rtc0 = &i2c_rtc;
> + rtc1 = &rk818;
> + };
> +
> + ext_gmac: external-gmac-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <125000000>;
> + clock-output-names = "ext_gmac";
> + };
> +
> + leds: user-leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&user_led>;
> +
> + user {
> + label = "green_led";
> + gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + default-state = "keep";
> + };
> + };
> +
> + vdd_emmc_io: vdd-emmc-io {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_emmc_io";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + vin-supply = <&vdd_3v3_io>;
> + };
> +
> + vdd_in_otg_out: vdd-in-otg-out {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_in_otg_out";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + };
> +
> + vdd_misc_1v8: vdd-misc-1v8 {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_misc_1v8";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +};
> +
> +&cpu0 {
> + cpu0-supply = <&vdd_cpu>;
> + operating-points = <
> + /* KHz uV */
> + 1800000 1400000
> + 1608000 1350000
> + 1512000 1300000
> + 1416000 1200000
> + 1200000 1100000
> + 1008000 1050000
> + 816000 1000000
> + 696000 950000
> + 600000 900000
> + 408000 900000
> + 312000 900000
> + 216000 900000
> + 126000 900000
> + >;
> +};
> +
> +&emmc {
> + status = "okay";
> + bus-width = <8>;
> + cap-mmc-highspeed;
> + disable-wp;
> + non-removable;
> + num-slots = <1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
> + vmmc-supply = <&vdd_3v3_io>;
> + vqmmc-supply = <&vdd_emmc_io>;
> +};
> +
> +&gmac {
> + assigned-clocks = <&cru SCLK_MAC>;
> + assigned-clock-parents = <&ext_gmac>;
> + clock_in_out = "input";
> + pinctrl-names = "default";
> + pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
> + phy-handle = <&phy0>;
> + phy-supply = <&vdd_eth_2v5>;
> + phy-mode = "rgmii-id";
> + snps,reset-active-low;
> + snps,reset-delays-us = <0 10000 1000000>;
> + snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
> + tx_delay = <0x0>;
> + rx_delay = <0x0>;
> +
> + mdio0 {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + phy0: ethernet-phy@0 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0>;
> + interrupt-parent = <&gpio4>;
> + interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
> + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
> + ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
> + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> + enet-phy-lane-no-swap;
> + };
> + };
> +};
> +
> +&hdmi {
> + ddc-i2c-bus = <&i2c5>;
> +};
> +
> +&io_domains {
> + status = "okay";
> + sdcard-supply = <&vdd_io_sd>;
> + flash0-supply = <&vdd_emmc_io>;
> + flash1-supply = <&vdd_misc_1v8>;
> + gpio1830-supply = <&vdd_3v3_io>;
> + gpio30-supply = <&vdd_3v3_io>;
> + bb-supply = <&vdd_3v3_io>;
> + dvp-supply = <&vdd_3v3_io>;
> + lcdc-supply = <&vdd_3v3_io>;
> + wifi-supply = <&vdd_3v3_io>;
> + audio-supply = <&vdd_3v3_io>;
> +};
> +
> +&i2c0 {
> + status = "okay";
> + clock-frequency = <400000>;
> +
> + rk818: pmic@1c {
> + compatible = "rockchip,rk818";
> + reg = <0x1c>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pmic_int>;
> + rockchip,system-power-controller;
> + wakeup-source;
> + #clock-cells = <1>;
> +
I think you miss "clock-output-names = "xin32k" here.
> + vcc1-supply = <&vdd_sys>;
> + vcc2-supply = <&vdd_sys>;
> + vcc3-supply = <&vdd_sys>;
> + vcc4-supply = <&vdd_sys>;
> + boost-supply = <&vdd_in_otg_out>;
> + vcc6-supply = <&vdd_sys>;
> + vcc7-supply = <&vdd_misc_1v8>;
> + vcc8-supply = <&vdd_misc_1v8>;
> + vcc9-supply = <&vdd_3v3_io>;
> + vddio-supply = <&vdd_3v3_io>;
> +
> + regulators {
> + vdd_log: DCDC_REG1 {
> + regulator-name = "vdd_log";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1100000>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_gpu: DCDC_REG2 {
> + regulator-name = "vdd_gpu";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1250000>;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1000000>;
> + };
> + };
> +
> + vcc_ddr: DCDC_REG3 {
> + regulator-name = "vcc_ddr";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vdd_3v3_io: DCDC_REG4 {
> + regulator-name = "vdd_3v3_io";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vdd_sys: DCDC_BOOST {
> + regulator-name = "vdd_sys";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <5000000>;
> + };
> + };
> +
> + /* vcc9 */
> + vdd_sd: SWITCH_REG {
> + regulator-name = "vdd_sd";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + /* vcc6 */
> + vdd_eth_2v5: LDO_REG2 {
> + regulator-name = "vdd_eth_2v5";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <2500000>;
> + };
> + };
> +
> + /* vcc7 */
> + vdd_1v0: LDO_REG3 {
> + regulator-name = "vdd_1v0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1000000>;
> + };
> + };
> +
> + /* vcc8 */
> + vdd_1v8_lcd_ldo: LDO_REG4 {
> + regulator-name = "vdd_1v8_lcd_ldo";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + /* vcc8 */
> + vdd_1v0_lcd: LDO_REG6 {
> + regulator-name = "vdd_1v0_lcd";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1000000>;
> + };
> + };
> +
> + /* vcc7 */
> + vdd_1v8_ldo: LDO_REG7 {
> + regulator-name = "vdd_1v8_ldo";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + /* vcc9 */
> + vdd_io_sd: LDO_REG9 {
> + regulator-name = "vdd_io_sd";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> + };
> + };
> +
> + /* M24C32-D */
> + i2c_eeprom: eeprom@50 {
> + compatible = "atmel,24c32";
> + reg = <0x50>;
> + pagesize = <32>;
> + };
> +
> + vdd_cpu: regulator@60 {
> + compatible = "fcs,fan53555";
> + reg = <0x60>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-enable-ramp-delay = <300>;
> + regulator-name = "vdd_cpu";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1430000>;
> + regulator-ramp-delay = <8000>;
> + vin-supply = <&vdd_sys>;
> + };
> +};
> +
> +&pinctrl {
> + pcfg_output_high: pcfg-output-high {
> + output-high;
> + };
> +
> + emmc {
> + /*
> + * We run eMMC at max speed; bump up drive strength.
> + * We also have external pulls, so disable the internal ones.
> + */
> + emmc_clk: emmc-clk {
> + rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>;
> + };
> +
> + emmc_cmd: emmc-cmd {
> + rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>;
> + };
> +
> + emmc_bus8: emmc-bus8 {
> + rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>,
> + <3 1 RK_FUNC_2 &pcfg_pull_none_12ma>,
> + <3 2 RK_FUNC_2 &pcfg_pull_none_12ma>,
> + <3 3 RK_FUNC_2 &pcfg_pull_none_12ma>,
> + <3 4 RK_FUNC_2 &pcfg_pull_none_12ma>,
> + <3 5 RK_FUNC_2 &pcfg_pull_none_12ma>,
> + <3 6 RK_FUNC_2 &pcfg_pull_none_12ma>,
> + <3 7 RK_FUNC_2 &pcfg_pull_none_12ma>;
> + };
> + };
> +
> + gmac {
> + phy_int: phy-int {
> + rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> +
> + phy_rst: phy-rst {
> + rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
> + };
> + };
> +
> + leds {
> + user_led: user-led {
> + rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>;
> + };
> + };
> +
> + pmic {
> + pmic_int: pmic-int {
> + rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> +
> + /* Pin for switching state between sleep and non-sleep state */
> + pmic_sleep: pmic-sleep {
> + rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +};
> +
> +&pwm1 {
> + status = "okay";
> +};
> +
> +&saradc {
> + status = "okay";
> + vref-supply = <&vdd_1v8_ldo>;
> +};
> +
> +&spi2 {
> + status = "okay";
> +
> + serial_flash: flash@0 {
> + compatible = "micron,n25q128a13", "jedec,spi-nor";
> + reg = <0x0>;
> + spi-max-frequency = <50000000>;
> + m25p,fast-read;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "okay";
> + };
> +};
> +
> +&tsadc {
> + status = "okay";
> + rockchip,hw-tshut-mode = <0>;
> + rockchip,hw-tshut-polarity = <0>;
> +};
> +
> +&vopb {
> + status = "okay";
> +};
> +
> +&vopb_mmu {
> + status = "okay";
> +};
> +
> +&vopl {
> + status = "okay";
> +};
> +
> +&vopl_mmu {
> + status = "okay";
> +};
> +
> +&wdt {
> + status = "okay";
> +};
> --
> 1.9.1
>
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