Thomas, Am 21.03.2017 um 11:38 schrieb Thomas Petazzoni: > Hello, > > This patch series adds support for on-die ECC, i.e ECC performed by > the NAND chip itself, as opposed to having the ECC calculated by the > NAND controller or in software. > > It is useful in situations where the NAND chip has an ECC requirement > that is not met by the ECC capabilities of the NAND controller. > > Patch 1 adjusts the NAND generic DT binding to add "on-die" as an > nand-ecc-mode. > > Patch 2 adds the core support for on-die ECC, which is really simple > and minimal: all the work is really done in the vendor-specific NAND > code. > > Patch 3 and 4 adds the on-die ECC implementation for Micron NANDs. > > Patch 5 allows the FSMC NAND driver to use on-die ECC. > > This series was tested on a SPEAr600 platform, with a Micron > MT29F1G08ABADAWP NAND. The mtd_nandbiterrs.ko test is passing > successfully, which shows that the on-die ECC is correcting bitflips > as expected. This series looks good to me. Great job! Reviewed-by: Richard Weinberger <richard@xxxxxx> Thanks, //richard -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
