Re: [PATCH 2/2] hwmon: Aspeed AST2400/AST2500 ADC

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On 03/02/2017 10:21 PM, Rob Herring wrote:
On Tue, Feb 28, 2017 at 07:45:23PM -0800, Guenter Roeck wrote:
On 02/28/2017 04:49 PM, Joel Stanley wrote:
On Wed, Mar 1, 2017 at 6:44 AM, Rick Altherr <raltherr@xxxxxxxxxx> wrote:
Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. This
driver implements reading the ADC values, enabling channels via device
tree, and optionally providing channel labels via device tree.  Low and
high threshold interrupts are supported by the hardware but not
implemented.

Signed-off-by: Rick Altherr <raltherr@xxxxxxxxxx>

Looks good. Some minor comments below.

Is there a reason you wrote a hwmon driver instead of an iio driver? I
wasn't sure what the recommended subsystem is.

Excellent point. Question is really if there is a plan to add support for
thresholds. If not, an iio driver might be more appropriate.

Sigh. We have ADCs in 2 places? Fine for the kernel I guess, but not
bindings.


Almost every {voltage, current, power, temperature} sensor chip is implemented
as ADC. Given that, we have (at least) three places. hwmon, iio, thermal.

Guenter

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