On 26/02/17 03:46, Chen-Yu Tsai wrote:
> Hi,
[...]
>> - gic: interrupt-controller@01c81000 {
>> - compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
>> - reg = <0x01c81000 0x1000>,
>> - <0x01c82000 0x2000>,
>> - <0x01c84000 0x2000>,
>> - <0x01c86000 0x2000>;
>> - interrupt-controller;
>> - #interrupt-cells = <3>;
>> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>
> The gic bits seem to be the same for both SoCs, aside from the
> different compatible
> string. Marc had sent a series to change them all to arm,gic-400, which is the
> proper name for it, but it wasn't merged. I'm assuming the compatibles
> are equal?
> If so then it can also be shared.
The series was fixing the various GICv2 memory maps, and is now in
mainline. If you have a good indication that all these SoCs are indeed
featuring a gic-400, feel free to amend the DT.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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