Add pin configuration subnode for SCIF2 serial debug interface. Signed-off-by: Jacopo Mondi <jacopo+renesas@xxxxxxxxxx> --- arch/arm/boot/dts/r7s72100-genmai.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts index 118a8e2..f7be440 100644 --- a/arch/arm/boot/dts/r7s72100-genmai.dts +++ b/arch/arm/boot/dts/r7s72100-genmai.dts @@ -36,6 +36,15 @@ }; }; +&pinctrl { + + scif2_pins: serial2 { + /* P3_0 as TxD2; P3_2 as RxD2 */ + renesas,pins = <PIN(3, 0) 6>, + <PIN(3, 2) (4 | INPUT_EN)>; + }; +}; + &extal_clk { clock-frequency = <13330000>; }; @@ -60,6 +69,9 @@ }; &scif2 { + pinctrl-names = "default"; + pinctrl-0 = <&scif2_pins>; + status = "okay"; }; -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html