Increase ADC reference clock from 3MHz to 24MHz so that the sampling rates goes up from 100K samples per second to 800K samples per second on AM335x and AM437x SoC. Signed-off-by: Mugunthan V N <mugunthanvnm@xxxxxx> --- include/linux/mfd/ti_am335x_tscadc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index b9a53e013bff..f6c449b96ea5 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -137,7 +137,7 @@ #define SEQ_STATUS BIT(5) #define CHARGE_STEP 0x11 -#define ADC_CLK 3000000 +#define ADC_CLK 24000000 #define TOTAL_STEPS 16 #define TOTAL_CHANNELS 8 #define FIFO1_THRESHOLD 19 -- 2.11.0.rc0.7.gbe5a750 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
