Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards

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Hi Daniel,

Thanks for reviewing.


On 11/07/2016 02:53 PM, Daniel Thompson wrote:
On 07/11/16 13:05, gabriel.fernandez@xxxxxx wrote:
From: Gabriel Fernandez <gabriel.fernandez@xxxxxx>

This patch introduces PLL_I2S and PLL_SAI.
Vco clock of these PLLs can be modify by DT (only n multiplicator,
m divider is still fixed by the boot-loader).
Each PLL has 3 dividers. PLL should be off when we modify the rate.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@xxxxxx>
---
drivers/clk/clk-stm32f4.c | 371 ++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 359 insertions(+), 12 deletions(-)

diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index c2661e2..7641acd 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -28,6 +28,7 @@
> ...
+static const struct clk_div_table pll_divp_table[] = {
+    { 0, 2 }, { 1, 4 }, { 2, 6 }, { 3, 8 },
+};
+
 /*
* Decode current PLL state and (statically) model the state we inherit from
  * the bootloader.
  */

This comment isn't right. For a start the model is no longer static.

you're right, i will suppress it.


@@ -615,18 +944,24 @@ struct stm32f4_clk_data {
     const struct stm32f4_gate_data *gates_data;
     const u64 *gates_map;
     int gates_num;
+    const struct stm32f4_pll_data *pll_data;
+    int pll_num;

pll_num is unused.

ok

BR

Gabriel


Daniel.

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