Hi Sergei,
On Wed, Nov 2, 2016 at 10:59 PM, Sergei Shtylyov
<sergei.shtylyov@xxxxxxxxxxxxxxxxxx> wrote:
> Add RZ/G1M (R8A7743) Clock Pulse Generator / Module Standby and Software
> Reset support, using the CPG/MSSR driver core and the common R-Car Gen2
> (and RZ/G) code.
>
> Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert Uytterhoeven
> <geert+renesas@xxxxxxxxx>.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>
> Acked-by: Rob Herring <robh@xxxxxxxxxx>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
>
> ---
> Changes in version 5:
> - describe the Z clock as PLL0/VCO divided by 2.
Why did you do that?
> --- /dev/null
> +++ renesas/drivers/clk/renesas/r8a7743-cpg-mssr.c
> @@ -0,0 +1,270 @@
> + DEF_FIXED("z", R8A7743_CLK_Z, CLK_PLL0, 2, 1),
FTR, previous version had
DEF_BASE("z", R8A7743_CLK_Z, CLK_TYPE_GEN2_Z, CLK_PLL0),
which made the "z" clock configurable.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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