Re: [PATCH V3 2/6] clk: tegra: add TEGRA30_CLK_NOR to init table

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On 27/10/16 15:01, Mirza Krak wrote:
From: Mirza Krak <mirza.krak@xxxxxxxxx>

Add TEGRA30_CLK_NOR to init table and set default rate to 127 MHz which
is max rate.

The maximum rate value of 127 MHz is pulled from the downstream L4T
kernel.

Signed-off-by: Mirza Krak <mirza.krak@xxxxxxxxx>
Tested-by: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx>
Tested-on: Colibri T20/T30 on EvalBoard V3.x and GMI-Memory Board

Acked-by: Jon Hunter <jonathanh@xxxxxxxxxx>

Cheers
Jon

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