Hi Linus,
On 09/13/2016 10:18 AM, Linus Walleij wrote:
On Fri, Sep 9, 2016 at 4:42 PM, Alexandre TORGUE
<alexandre.torgue@xxxxxx> wrote:
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@xxxxxxxxx>
Acked-by: Rob Herring <robh@xxxxxxxxxx>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@xxxxxx>
diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
index 587bffb..a0eed99 100644
--- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
@@ -14,6 +14,9 @@ Required properies:
- #size-cells : The value of this property must be 1
- ranges : defines mapping between pin controller node (parent) to
gpio-bank node (children).
+ - interrupt-parent: phandle of the interrupt parent to which the external
+ GPIO interrupts are forwarded to.
+ - st,syscfg: phandle of the syscfg node used for IRQ mux selection.
Actually this doc is incomplete.
This is a phandle + offset, not just a phandle.
It is a small detail so I don't care much, either send a patch to
fix up this doc (I have already merged it) or patch the driver
to not retrieve the offset and instead use
#define SYSCFG_OFFSET 0x08
or something...
I'll send a patch for Documentation.
Do I need to wait this series is officially released (4.9-rc1) or can I
send it now ?
Regards
Alex
Yours,
Linus Walleij
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