On Thu, Sep 08, 2016 at 02:13:26PM +0100, Mark Rutland wrote:
> On Mon, Sep 05, 2016 at 06:01:31PM +0800, shh.xie@xxxxxxxxx wrote:
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu0: cpu@0 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a72";
> > + reg = <0x0>;
> > + clocks = <&clockgen 1 0>;
> > + next-level-cache = <&l2>;
> > + cpu-idle-states = <&CPU_PH20>;
> > + };
>
> [...]
>
> > + };
> > +
> > + idle-states {
> > + entry-method = "arm,psci";
> > +
> > + CPU_PH20: cpu-ph20 {
> > + compatible = "arm,idle-state";
> > + idle-state-name = "PH20";
> > + arm,psci-suspend-param = <0x00010000>;
> > + entry-latency-us = <1000>;
> > + exit-latency-us = <1000>;
> > + min-residency-us = <3000>;
> > + };
> > + };
>
> There's no PSCI node in this file, and none from am included file, so
> this doesn't look right.
Looking again, none of the cpu nodes has an enable-method property, and
subsequent patches don't seem to add that to any cpu node.
Has this DT actually been tested?
Thanks,
Mark.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
