On Fri, Nov 8, 2013 at 4:38 AM, Sricharan R <r.sricharan@xxxxxx> wrote: > The binding and support for omap5-mpu which has a cortex-a15 > smp core, gic and integrated L2 cache has been existing for sometime. > So Documenting the missing binding here. > > Cc: Benoit Cousson <bcousson@xxxxxxxxxxxx> > Signed-off-by: Sricharan R <r.sricharan@xxxxxx> > --- > Documentation/devicetree/bindings/arm/omap/mpu.txt | 8 ++++++++ > 1 file changed, 8 insertions(+) Applied for 3.13. Rob -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
