On Tuesday 30 August 2016 08:28 PM, Grygorii Strashko wrote: > Current clocks tree definition for CPSW/CPTS doesn't > correspond TRM for dra7/am57 SoCs. > > CPTS: has to be sourced from gmac_rft_clk_mux clock > CPSW: DPLL_GMAC -> CLKOUT_M2 -> GMAC_250M_CLK -> 1/2 -> > -> GMAC_MAIN_CLK (125 MHZ) > > Hence, correct clock tree for GMAC_MAIN_CLK and use proper > clock for CPTS. This also require updating of CPTS clock > multiplier. > > Cc: Tero Kristo <t-kristo@xxxxxx> > Cc: Mugunthan V N <mugunthanvnm@xxxxxx> > Signed-off-by: Grygorii Strashko <grygorii.strashko@xxxxxx> Reviewed-by: Mugunthan V N <mugunthanvnm@xxxxxx> Regards Mugunthan V N -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
