On 27 May 2016 at 17:41, Rob Herring <robh@xxxxxxxxxx> wrote: > On Fri, May 27, 2016 at 09:23:20AM +0200, loic pallardy wrote: >> >> >> On 05/26/2016 03:20 PM, Rob Herring wrote: >> >On Thu, May 26, 2016 at 8:05 AM, loic pallardy <loic.pallardy@xxxxxx> wrote: >> >> >> >> >> >>On 05/26/2016 02:46 PM, Rob Herring wrote: >> >>> >> >>>On Thu, May 26, 2016 at 4:49 AM, Gabriel Fernandez >> >>><gabriel.fernandez@xxxxxxxxxx> wrote: >> >>>> >> >>>>On 25 May 2016 at 19:24, Rob Herring <robh@xxxxxxxxxx> wrote: >> >>>>> >> >>>>> >> >>>>>On Wed, May 18, 2016 at 10:41:23AM +0200, Gabriel Fernandez wrote: >> >>>>>> >> >>>>>>This patch allows fine tuning of the quads FS for audio clocks >> >>>>>>accuracy. >> >>>>>> > >> >>> >> >>>That is no different and suffers the same point I raised. It requires >> >>>updating the DT for any clock configuration change or enhancement. >> >>> >> >>Agree with you, DT update is needed as soon as a clock configuration should >> >>be changed. This is due to STiH clock driver design based on DT description >> >>of SoC clock tree. >> >> >> >>This clock driver was accepted 2 years ago. At the time being there was >> >>discussion about clock tree description location: driver or DT. >> >>Bad choice was done for this driver... >> >> >> >>If we decide to redesign STiH clock driver using in-driver clock tree >> >>description, this will modify STiH clock DT nodes description and so break >> >>DT backward compatibility. >> >> >> >>What's from your pov the best option? >> > >> >You can break it once or every time you need a clock change. I'd go >> >with the former. Maybe more specific compatible strings throughout >> >alone would be enough rather than a flag day changing the binding. >> >> So if I understand you correctly, main issue is d0 and d2 signification. >> d0 and d2 are indeed location of the flexgen in the SoC. But that's right >> flexgen are dedicated to clocks generation for features (system, audio, >> video). >> What about "st,flexgen-audio" and "st,flexgen-video"? > > It is not so much the name of these 2, but whether there are other cases > for different clock nodes that could need the same thing. If so, update > them all now rather than 1 by 1. > > Rob Hi Rob, Ok i will send a V2 for that. Mike, the first patch "drivers: clk: st: Add fs660c32 synthesizer algorithm" can be taken into account regardless the remark of Rob. Can you have a look ? Thanks. Best Regards Gabriel -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
