On Friday 15 April 2016 01:30 PM, Mark Brown wrote:
* PGP Signed by an unknown key
On Fri, Apr 15, 2016 at 09:54:34AM +0200, Linus Walleij wrote:
On Tue, Apr 12, 2016 at 4:56 PM, Laxman Dewangan <ldewangan@xxxxxxxxxx> wrote:
NVIDIA Tegra210 supports some of the IO interface which can operate
at 1.8V or 3.3V I/O rail voltage levels. SW needs to configure
Tegra PMC register to set different voltage level of IO interface based
on IO rail voltage from power supply i.e. power regulators.
Nobody seems to mention the elephant in the room: why is this
not using the regulator subsystem and instead using custom
code under drivers/soc? We have worried before about drivers/soc
becoming a dumping ground akin to drivers/misc
The above changelog sounds like a regulator consumer not a regulator -
based on what I'm reading there it's a driver that looks at the voltage
being supplied to the device and sets some configuration in the device
based on that voltage. This isn't that unusual for analogue circuits
but it's definitely not something that's actually doing voltage
regulation.
Yes, this is not the voltage regulation or supply the voltage and hence
can not be in regulator.
The IO pads voltage need to be configure by SW based on voltage level on
this it is connected.
Some of tegra IO pads design like that they do not have auto detect for
voltage level and SW needs to explicitly set.
Because this is for making IO interface to be proper functioning, I put
this in the pin controller rather than some other folder.
Other place my be soc/tegra but as the interfaces are from pin control
framework, it is here.
Hope I have not confused with APIs, tegra_io_rail_voltage_set().
Otherwise, tegra_io_rail_voltage_configure()??
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