Hi Yingjoe, On Thu, 2016-04-14 at 18:56 +0800, Yingjoe Chen wrote: > On Thu, 2016-04-14 at 16:16 +0800, James Liao wrote: > > From: Shunli Wang <shunli.wang@xxxxxxxxxxxx> > > > > Add power dt-bindings for MT2701. > > > > Signed-off-by: Shunli Wang <shunli.wang@xxxxxxxxxxxx> > > Signed-off-by: James Liao <jamesjj.liao@xxxxxxxxxxxx> > > Acked-by: Rob Herring <robh@xxxxxxxxxx> > > Reviewed-by: Kevin Hilman <khilman@xxxxxxxxxxxx> > > --- > > .../devicetree/bindings/soc/mediatek/scpsys.txt | 12 ++++++---- > > include/dt-bindings/power/mt2701-power.h | 27 ++++++++++++++++++++++ > > 2 files changed, 34 insertions(+), 5 deletions(-) > > create mode 100644 include/dt-bindings/power/mt2701-power.h > > > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > index e8f15e3..ebb3144 100644 > > --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > @@ -9,17 +9,19 @@ domain control. > > > > The driver implements the Generic PM domain bindings described in > > power/power_domain.txt. It provides the power domains defined in > > -include/dt-bindings/power/mt8173-power.h. > > +include/dt-bindings/power/mt8173-power.h and mt2701-power.h. > > > > Required properties: > > -- compatible: Must be "mediatek,mt8173-scpsys" > > +- compatible: Should be one of: > > + - "mediatek,mt2701-scpsys" > > + - "mediatek,mt8173-scpsys" > > - #power-domain-cells: Must be 1 > > - reg: Address range of the SCPSYS unit > > - infracfg: must contain a phandle to the infracfg controller > > - clock, clock-names: clocks according to the common clock binding. > > - The clocks needed "mm", "mfg", "venc" and "venc_lt". > > - These are the clocks which hardware needs to be enabled > > - before enabling certain power domains. > > + The clocks needed "mm", "mfg", "venc", "venc_lt" and > > + "ethif". These are the clocks which hardware needs to be > > + enabled before enabling certain power domains. > > > Clock ethif only exist on mt2701 so it is not required on mt8173. You are right. Each SoC needs different clock for each power domain. Here list all subsystems of available SoCs. Best regards, James -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
