Hi Stephen On Fri, Apr 01, 2016 at 06:14:36PM -0700, Stephen Boyd wrote: > On 03/19, Rob Herring wrote: > > On Thu, Mar 17, 2016 at 07:43:42PM +1100, yassinjaffer@xxxxxxxxx wrote: > > > From: Yassin Jaffer <yassinjaffer@xxxxxxxxx> > > > > > > This patch adds a composite clock type consisting of > > > a clock gate, mux, configurable dividers, and a reset control. > > > > > > Signed-off-by: Yassin Jaffer <yassinjaffer@xxxxxxxxx> > > > --- > > > Documentation/devicetree/bindings/clock/sunxi.txt | 1 + > > > > I wish someone would just add all the sunxi clocks in one pass instead > > of one by one. > > > > Acked-by: Rob Herring <robh@xxxxxxxxxx> > > Me too! I understand, but it's probably not going to happen. The clock tree is massive, and obviously you have to multiply that by the number of SoCs we have. And to be honest, I don't really see the point of merging clock drivers that have never been tested, and might be massively broken, especially now that we have this ABI requirement for the DT, and we can't adjust the binding when we actually start using that clock. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
Attachment:
signature.asc
Description: Digital signature
