On Tue, Mar 29, 2016 at 02:24:13PM +0200, Cyrille Pitchen wrote: > This patch adds a new optional DT property which enables an alternative > way of supporting memory size above 16MiB (128Mib). This new mechanism > translates the regular 3byte-address op codes into their 4byte-address > version whereas the old/default mecanism makes the SPI memory enter its > 4byte-address mode, which has annoying side effects for early bootloaders. > > We cannot discover at run time whether the SPI NOR memory supports the > 4byte-address op codes. For instance both Macronix MX25L25635E and > MX25L25673G share the same JEDEC ID (C22019 without any extension byte). > However the first one doesn't support 4byte-address op codes whereas the > second one does. > > Signed-off-by: Cyrille Pitchen <cyrille.pitchen@xxxxxxxxx> > --- > Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt | 11 +++++++++++ > 1 file changed, 11 insertions(+) Acked-by: Rob Herring <robh@xxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
