Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both Zynq and Microblaze Architectures. With these modifications drivers/pci/host/pcie-xilinx.c, will work on both Zynq and Microblaze Architectures. Signed-off-by: Bharat Kumar Gogada <bharatku@xxxxxxxxxx> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xxxxxxxxxx> Reviewed-by: Arnd Bergmann <arnd@xxxxxxxx> --- Changes: Added #ifdef to pci_fixup_irqs which is ARM specific API. --- drivers/pci/host/pcie-xilinx.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c index 13fec35..8ad50fe 100644 --- a/drivers/pci/host/pcie-xilinx.c +++ b/drivers/pci/host/pcie-xilinx.c @@ -704,7 +704,9 @@ static int xilinx_pcie_probe(struct platform_device *pdev) #endif pci_scan_child_bus(bus); pci_assign_unassigned_bus_resources(bus); +#ifndef CONFIG_MICROBLAZE pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci); +#endif pci_bus_add_devices(bus); platform_set_drvdata(pdev, port); -- 2.1.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
