On 09/12/15 16:58, Dirk Behme wrote:
On 08.12.2015 20:16, Mark Rutland wrote:
[...]
With the other properties from ePAPR you can acquire information on the
geometry of the cache, which cannot be acquired from architected
registers.
Just for my understanding: Yes, if other properties from ePAPR like
geometry of the cache are added to the device tree l2 cache entries then
it makes sense to have them.
But an "empty" entry like the one given in the example above doesn't
make much sense and could be removed without loosing any functionality?
No they are required to detect the cache hierarchy as there's no
architectural way of detecting the same.
It looks to me that most of the L2 entries we have in
arch/arm64/boot/dts are such "empty" entries.
True *so far*, we have not seen a case where we need to override the
values read in a architectural way.
--
Regards,
Sudeep
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