On 11/30/2015 07:29 AM, Dmitry Lifshitz wrote: > On 11/29/2015 07:06 PM, Nishanth Menon wrote: >> On 11/29/2015 06:10 AM, Dmitry Lifshitz wrote: [...] >> >> You might want to ask your TI support contact for IODelay >> recommendations. TRM mentions that pinmuxing must be performed under IO >> isolation. There are silicon constraints in DRA7/AM57xx family, which >> were not present previously. >> > > Ok. I understand. This might take time... > Since we'd like to have this in for 4.5, what would you recommend? > Should I drop the muxes from this patch set? All the muxes? > Or should we merge this (as it works correctly) in our tests and check > on this later after investigation with TI? > > Also, in theory, there might be pins shared between two or more > different functionalities and remuxed during runtime. > Can this kind of thing be supported on AM57x? This is why I suggested to talk and confirm with TI support contact on this. I understand the motivation of SoM concept, but this requires some careful designing around. -- Regards, Nishanth Menon -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
