On Mon, 23 Nov 2015 11:16:54 +0100
Carlo Caione <carlo@xxxxxxxxxx> wrote:
> From: Carlo Caione <carlo@xxxxxxxxxxxx>
>
> On Meson8 and Meson8b SoCs there are 8 independent filtered GPIO
> interrupt modules that can be programmed to use any of the GPIOs in the
> chip as an interrupt source.
>
> For each GPIO IRQ we have:
>
> GPIOs --> [mux]--> [polarity]--> [filter]--> [edge select]--> GIC
>
> The eight GPIO interrupts respond to mask/unmask/clear/etc.. just like
> any other interrupt in the chip. The difference for the GPIO interrupts
> is that they can be filtered and conditioned.
>
> This patch adds support for the external GPIOs interrupts and enables
> them for Meson8 and Meson8b SoCs.
>
> Signed-off-by: Carlo Caione <carlo@xxxxxxxxxxxx>
> Signed-off-by: Beniamino Galvani <b.galvani@xxxxxxxxx>
>
> ---
[...]
> + for (i = 0; i < pc->num_gic_irqs; i++) {
> + struct of_phandle_args oirq;
> +
> + of_irq_parse_one(node, i, &oirq);
> + irq_of_phandle_args_to_fwspec(&oirq, &pc->gic_irqs[i]);
> +
> + pc->irq_map[i] = IRQ_FREE;
> + }
The whole thing feels weird. Why do you need to keep a set of fwspecs?
All you need is a range of interrupts that would be conveniently
represented by a bitmap (assuming your interrupts space is a mostly
contiguous range).
Overall, this patch is quite hard to review. Can you please split the
GPIO management from the irqchip side?
Thanks,
M.
--
Jazz is not dead. It just smells funny.
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