From: Carlo Caione <carlo@xxxxxxxxxxxx> In Meson SoCs we have 8 independent GPIO interrupts that can be programmed to use any of the GPIOs in the chip as interrupt source. These GPIOs are managed by GIC but they can be conditioned (and enabled) by some registers external to the GIC. GPIOs |--[mux1 or mux2]--[polarity]--[filter]--[edge_select]--> GIC For discussion see comment to the [PATCH 3/5]. Changelog: * V2: - Introduced .irq_request_resources() and .irq_release_resources() - s/virq/irq/ and s/pin/hwirq/ - Moved to the new irq_fwspec Carlo Caione (5): of/irq: export of_irq_find_parent again irqdomain: introduce irq_of_phandle_args_to_fwspec pinctrl: meson: enable GPIO IRQs pinctrl: dt-binding: Extend meson documentation with GPIO IRQs support ARM: meson: DTS: Enable GPIO IRQs .../devicetree/bindings/pinctrl/meson,pinctrl.txt | 12 + arch/arm/boot/dts/meson8b.dtsi | 6 + drivers/of/irq.c | 2 +- drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/meson/pinctrl-meson.c | 303 +++++++++++++++++++++ drivers/pinctrl/meson/pinctrl-meson.h | 18 +- drivers/pinctrl/meson/pinctrl-meson8.c | 36 ++- drivers/pinctrl/meson/pinctrl-meson8b.c | 36 ++- include/linux/of_irq.h | 8 + kernel/irq/irqdomain.c | 5 +- 10 files changed, 393 insertions(+), 34 deletions(-) -- 2.5.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html