Hi,
Am Mittwoch, 4. November 2015, 20:18:16 schrieb Xing Zheng:
> Add the devicetree binding for the cru on the rk3036 which quite similar
> structured as previous clock controllers.
>
> Signed-off-by: Xing Zheng <zhengxing@xxxxxxxxxxxxxx>
> Reviewed-by: Heiko Stuebner <heiko@xxxxxxxxx>
> ---
your recipient-list is missing the clock maintainers+lists - sorry for
not noticing this earlier.
While the devicetree-maintainers may Review it, we expect the clock-
maintainers to actually apply all 4 clock-related patches.
Same comment is true for
[PATCH v6 2/8] clk: rockchip: add dt-binding header for rk3036
Heiko
>
> Changes in v6: None
>
> .../bindings/clock/rockchip,rk3036-cru.txt | 56 ++++++++++++++++++++
> 1 file changed, 56 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt
>
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt
> new file mode 100644
> index 0000000..ace0599
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt
> @@ -0,0 +1,56 @@
> +* Rockchip RK3036 Clock and Reset Unit
> +
> +The RK3036 clock controller generates and supplies clock to various
> +controllers within the SoC and also implements a reset controller for SoC
> +peripherals.
> +
> +Required Properties:
> +
> +- compatible: should be "rockchip,rk3036-cru"
> +- reg: physical base address of the controller and length of memory mapped
> + region.
> +- #clock-cells: should be 1.
> +- #reset-cells: should be 1.
> +
> +Optional Properties:
> +
> +- rockchip,grf: phandle to the syscon managing the "general register files"
> + If missing pll rates are not changeable, due to the missing pll lock status.
> +
> +Each clock is assigned an identifier and client nodes can use this identifier
> +to specify the clock which they consume. All available clocks are defined as
> +preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be
> +used in device tree sources. Similar macros exist for the reset sources in
> +these files.
> +
> +External clocks:
> +
> +There are several clocks that are generated outside the SoC. It is expected
> +that they are defined using standard clock bindings with following
> +clock-output-names:
> + - "xin24m" - crystal input - required,
> + - "ext_i2s" - external I2S clock - optional,
> + - "ext_gmac" - external GMAC clock - optional
> +
> +Example: Clock controller node:
> +
> + cru: cru@20000000 {
> + compatible = "rockchip,rk3036-cru";
> + reg = <0x20000000 0x1000>;
> + rockchip,grf = <&grf>;
> +
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> +
> +Example: UART controller node that consumes the clock generated by the clock
> + controller:
> +
> + uart0: serial@20060000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x20060000 0x100>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + clocks = <&cru SCLK_UART0>;
> + };
>
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