Hi Ezequiel
+#define CORE_CLOCK_DIVIDER_RATIO_OFFSET 0x8
...
reg = readl(corediv->reg + CORE_CLOCK_DIVIDER_RATIO_OFFSET);
...
+Example:
+
+corediv_clk: corediv-clocks@18740 {
+ compatible = "marvell,armada-370-corediv-clock";
+ reg = <0x18740 0x8>;
+ #clock-cells = <1>;
+ clocks = <&pll>;
+};
The reg property seems to be wrong.
Andrew
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