RE: [PATCHv3 2/4] ARM: dts: Add Freescale FTM PWM node for VF610.

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> > diff --git a/arch/arm/boot/dts/vf610.dtsi
> > b/arch/arm/boot/dts/vf610.dtsi index 67d929c..44787b5 100644
> > --- a/arch/arm/boot/dts/vf610.dtsi
> > +++ b/arch/arm/boot/dts/vf610.dtsi
> > @@ -140,6 +140,37 @@
> >  				clock-names = "pit";
> >  			};
> >
> > +			pwm0: pwm@40038000 {
> > +				compatible = "fsl,vf610-ftm-pwm";
> > +				#pwm-cells = <3>;
> > +				reg = <0x40038000 0x1000>;
> > +				clock-names = "ftm0", "ftm0_fix_sel",
> "ftm0_ext_sel";
> > +				clocks = <&clks VF610_CLK_FTM0>,
> > +					<&clks VF610_CLK_FTM0_FIX_SEL>,
> > +					<&clks VF610_CLK_FTM0_EXT_SEL>;
> > +				pinctrl-names = "ch0-active", "ch0-idle", "ch1-
> active", "ch1-idle",
> > +						"ch2-active", "ch2-idle", "ch3-
> active", "ch3-idle",
> > +						"ch4-active", "ch4-idle", "ch5-
> active", "ch5-idle",
> > +						"ch6-active", "ch6-idle", "ch7-
> active", "ch7-idle";
> > +				pinctrl-0 = <&pinctrl_pwm0_ch0_active>;
> > +				pinctrl-1 = <&pinctrl_pwm0_ch0_idle>;
> > +				pinctrl-2 = <&pinctrl_pwm0_ch1_active>;
> > +				pinctrl-3 = <&pinctrl_pwm0_ch1_idle>;
> > +				pinctrl-4 = <&pinctrl_pwm0_ch2_active>;
> > +				pinctrl-5 = <&pinctrl_pwm0_ch2_idle>;
> > +				pinctrl-6 = <&pinctrl_pwm0_ch3_active>;
> > +				pinctrl-7 = <&pinctrl_pwm0_ch3_idle>;
> > +				pinctrl-8 = <&pinctrl_pwm0_ch4_active>;
> > +				pinctrl-9 = <&pinctrl_pwm0_ch4_idle>;
> > +				pinctrl-10 = <&pinctrl_pwm0_ch5_active>;
> > +				pinctrl-11 = <&pinctrl_pwm0_ch5_idle>;
> > +				pinctrl-12 = <&pinctrl_pwm0_ch6_active>;
> > +				pinctrl-13 = <&pinctrl_pwm0_ch6_idle>;
> > +				pinctrl-14 = <&pinctrl_pwm0_ch7_active>;
> > +				pinctrl-15 = <&pinctrl_pwm0_ch7_idle>;
> > +				status = "disabled";
> > +			};
> 
> This is a SoC file, but the pinmux is board specific. The pinmux settings
> probably shouldn't be here.
> 
Yes, agreed.

I will revise it soon.

--
Xiubo

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