[PATCH 2/2] arm: dts: dra7-evm: Add extcon dt nodes for USB ID detection

[George Cherian <george.cherian@xxxxxx>]

Adding extcon dt nodes for USB ID detection.
ID pin is routed via the gpio expander , so adding pcf8575 nodes.
Changing otg mode to peripheral mode for usb1

Signed-off-by: George Cherian <george.cherian@xxxxxx>
---
 arch/arm/boot/dts/dra7-evm.dts | 42 +++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 41 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index acd3c09..fc9a506 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -17,6 +17,23 @@
 		device_type = "memory";
 		reg = <0x80000000 0x60000000>; /* 1536 MB */
 	};
+
+	extcon1: dra7x_extcon1 {
+		compatible = "ti,dra7xx-usb";
+		gpios = <&pcf_usb 1 0>,
+			<&gpio6 11 2>;
+		interrupt-parent = <&gpio6>;
+		interrupts = <11>;
+	};
+
+	extcon2: dra7x_extcon2 {
+		compatible = "ti,dra7xx-usb";
+		gpios = <&pcf_usb 2 0>,
+			<&gpio6 11 2>;
+		interrupt-parent = <&gpio6>;
+		interrupts = <11>;
+	};
+
 };
 
 &dra7_pmx_core {
@@ -33,10 +50,33 @@
         };
 };
 
+&i2c1 {
+	clock-frequency = <400000>;
+
+	pcf_lcd: pcf8575@20 {
+		compatible = "ti,pcf8575";
+		reg = <0x20>;
+		n_latch = <0xbc50>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	pcf_usb: pcf8575@21 {
+		compatible = "ti,pcf8575";
+		reg = <0x21>;
+		n_latch = <0xffff>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+};
+
 &dwc3_1 {
-	dr_mode = "otg";
+	dr_mode = "peripheral";
+	extcon = <&extcon1>;
 };
 
 &dwc3_2 {
 	dr_mode = "host";
+	extcon = <&extcon2>;
 };
-- 
1.8.1.4

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