Torsten72 wrote: > there is a via padlock sdk which is available at > http://www.viaarena.com/Download/PadlockSDK_2.0.1_Release_20060803.zip > If you have a look at the source perhaps you will know how to use the > new instructions. Some information can be extracted from source code, but important information that is still missing about SHA1 and SHA256 hashes: - What processor flags are modified and how. - What processor registers are modified and how. - Description of all opcode bits. Example source uses constant opcode bytes, but no info is available about what each bit means. - What opcodes to use when data to hash is not contiguous. In loop-AES kernel driver code, input data to hash is in three non-contiguous chunks. - Description of how context switching is handled. - What exceptions occur under what conditions. VIA supplied example source code is for userland use, and is not suitable for kernel driver use. First source file that I looked at was src/padlock_sha.c and I spotted a showstopper bug in less than 10 seconds of reading (malloc without checking return value). Kernel driver use of SHA1 and SHA256 would need new interface code to be written, and above mentioned missing info must be available before that can be done. > see page 19 of the following file for a comparison of C3 and C7 features > http://www.via.com.tw/en/downloads/whitepapers/initiatives/padlock/VIAPadLockSecurityEngine.pdf That PDF is just marketing propaganda. Features mentioned, but no info about how to bit-bang the device. -- Jari Ruusu 1024R/3A220F51 5B 4B F9 BB D3 3F 52 E9 DB 1D EB E3 24 0E A9 DD - Linux-crypto: cryptography in and on the Linux system Archive: http://mail.nl.linux.org/linux-crypto/
