Jari Ruusu schrieb:
torsten.st@xxxxxxx,
Could you check that the VIA C7 processor was properly detected by loop-AES
code? If it was properly detected, then there should be "loop: padlock
hardware AES enabled" message in your kernel log. You can check that using
command "dmesg | grep loop" or "grep loop /var/log/messages". Padlock
enabled loop includes both software AES and padlock AES implementations. If
padlock detection fails, then code uses software AES implementation.
the kernel prints these lines:
loop: padlock hardware AES enabled
loop: AES key scrubbing enabled
loop: loaded (max 8 devices)
The C7 would not be able to achieve 55 MB/s with a software implementation.
>
> I ask this because when loop-AES padlock code was written, I only had
older
> VIA C3 processor programming manual. loop-AES code follows older VIA C3
> padlock detection instructions. When C7 was new, a VIA representative
> promised me C7 programming manual, but I never got it. Pinged twice, no
> reply.
>
But your padlock implementation obviously supports the new AES-256 mode
of the C7, doesn't it?
Could loop-AES IV computation also be done in padlock and speed things up?
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Linux-crypto: cryptography in and on the Linux system
Archive: http://mail.nl.linux.org/linux-crypto/
