Re: [PATCH bpf-next v2 00/15] bpf: Support new insns from cpu v4

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Hi Yonghong.

>>>>    . sign extended load
>>>>    . sign extended mov
>>>>    . bswap
>>>>    . signed div/mod
>>>>    . ja with 32-bit offset

I am adding the V4 BPF instructions to binutils.  Where is the precise
"pseudo-c" syntax used by the new instructions documented?

For ALU sdiv/smod we are using:

   rd s/= rs
   rd s%= rs

For ALU32 sdiv/smod we are using:

   wd s/= ws
   wd s%= ws

For ALU movs instruction I just made up:

   rd s= (i8) rs
   rd s= (i16) rs
   rd s= (i32) rs

For ALU32 movs I just made up:

   wd s= (i8) ws
   wd s= (i16) ws
   wd s= (i32) ws

Thanks!





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