On Wed, Feb 10, 2021 at 12:45 PM Ilya Leoshkevich <iii@xxxxxxxxxxxxx> wrote: > > All 32-bit variants of BPF_FETCH (add, and, or, xor, xchg, cmpxchg) > define a 32-bit subreg and thus have zext_dst set. Their encoding, > however, uses dst_reg field as a base register, which causes > opt_subreg_zext_lo32_rnd_hi32() to zero-extend said base register > instead of the one the insn really defines (r0 or src_reg). > > Fix by properly choosing a register being defined, similar to how > check_atomic() already does that. > > Signed-off-by: Ilya Leoshkevich <iii@xxxxxxxxxxxxx> Applied. Thanks
