Re: [PATCH v2 1/5] perf: arm_spe: Add format option for discard mode

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On 07/01/2025 5:39 pm, Will Deacon wrote:
On Tue, Dec 24, 2024 at 10:44:08AM +0000, James Clark wrote:
FEAT_SPEv1p2 (optional from Armv8.6) adds a discard mode that allows all
SPE data to be discarded rather than written to memory. Add a format
bit for this mode.

If the mode isn't supported, the format bit isn't published and attempts
to use it will result in -EOPNOTSUPP. Allocating an aux buffer is still
allowed even though it won't be written to so that old tools continue to
work, but updated tools can choose to skip this step.

Reviewed-by: Yeoreum Yun <yeoreum.yun@xxxxxxx>
Signed-off-by: James Clark <james.clark@xxxxxxxxxx>
---
  drivers/perf/arm_spe_pmu.c | 23 +++++++++++++++++++++++
  1 file changed, 23 insertions(+)

diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c
index fd5b78732603..9aaf3f98e6f5 100644
--- a/drivers/perf/arm_spe_pmu.c
+++ b/drivers/perf/arm_spe_pmu.c
@@ -193,6 +193,9 @@ static const struct attribute_group arm_spe_pmu_cap_group = {
  #define ATTR_CFG_FLD_store_filter_CFG		config	/* PMSFCR_EL1.ST */
  #define ATTR_CFG_FLD_store_filter_LO		34
  #define ATTR_CFG_FLD_store_filter_HI		34
+#define ATTR_CFG_FLD_discard_CFG		config	/* PMBLIMITR_EL1.FM = DISCARD */
+#define ATTR_CFG_FLD_discard_LO			35
+#define ATTR_CFG_FLD_discard_HI			35
#define ATTR_CFG_FLD_event_filter_CFG config1 /* PMSEVFR_EL1 */
  #define ATTR_CFG_FLD_event_filter_LO		0
@@ -216,6 +219,7 @@ GEN_PMU_FORMAT_ATTR(store_filter);
  GEN_PMU_FORMAT_ATTR(event_filter);
  GEN_PMU_FORMAT_ATTR(inv_event_filter);
  GEN_PMU_FORMAT_ATTR(min_latency);
+GEN_PMU_FORMAT_ATTR(discard);
static struct attribute *arm_spe_pmu_formats_attr[] = {
  	&format_attr_ts_enable.attr,
@@ -228,9 +232,15 @@ static struct attribute *arm_spe_pmu_formats_attr[] = {
  	&format_attr_event_filter.attr,
  	&format_attr_inv_event_filter.attr,
  	&format_attr_min_latency.attr,
+	&format_attr_discard.attr,
  	NULL,
  };
+static bool discard_unsupported(struct arm_spe_pmu *spe_pmu)
+{
+	return spe_pmu->pmsver < ID_AA64DFR0_EL1_PMSVer_V1P2;
+}
Why not add a new SPE_PMU_FEAT_* for this and handle it in a similar
way to other optional hardware features?

Will
Hmmm good point, I'm not sure why I didn't do it that way. Possibly 
because it's only based off pmsver which is already saved, whereas the 
other feats are based off reading PMSIDR which is thrown away. But I can 
add SPE_PMU_FEAT_DISCARD.
Thanks
James






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